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            <div class="title">IOMSTR - I2C/SPI Master</div>
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        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 class="panel-title"> IOMSTR Register Index</h3>
            </div>
            <div class="panel-body">
                <table>
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000000:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#FIFO" target="_self">FIFO - FIFO Access Port</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000100:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#FIFOPTR" target="_self">FIFOPTR - Current FIFO Pointers</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000104:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#TLNGTH" target="_self">TLNGTH - Transfer Length</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000108:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#FIFOTHR" target="_self">FIFOTHR - FIFO Threshold Configuration</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x0000010C:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CLKCFG" target="_self">CLKCFG - I/O Clock Configuration</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000110:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMD" target="_self">CMD - Command Register</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000114:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMDRPT" target="_self">CMDRPT - Command Repeat Register</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000118:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#STATUS" target="_self">STATUS - Status Register</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x0000011C:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CFG" target="_self">CFG - I/O Master Configuration</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000200:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#INTEN" target="_self">INTEN - IO Master Interrupts: Enable</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000204:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#INTSTAT" target="_self">INTSTAT - IO Master Interrupts: Status</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000208:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#INTCLR" target="_self">INTCLR - IO Master Interrupts: Clear</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x0000020C:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#INTSET" target="_self">INTSET - IO Master Interrupts: Set</a>
                        </td>
                    </tr>

                </table>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="FIFO" class="panel-title">FIFO - FIFO Access Port</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x50004000</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x50005000</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>FIFO Access Port</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
// AM_REGn(&lt;MODULE&gt;, &lt;INSTANCE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;(&lt;NUMBER&gt;);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//</span>
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">FIFO
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>FIFO</td>
                            <td>RW</td>
                            <td>FIFO access port.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="FIFOPTR" class="panel-title">FIFOPTR - Current FIFO Pointers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x50004100</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x50005100</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Current FIFO Pointers</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
// AM_REGn(&lt;MODULE&gt;, &lt;INSTANCE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;(&lt;NUMBER&gt;);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//</span>
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="9">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="7">FIFOREM
                                <br>0x0</td>

                            <td align="center" colspan="9">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="7">FIFOSIZ
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:23</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>22:16</td>
                            <td>FIFOREM</td>
                            <td>RO</td>
                            <td>The number of bytes remaining in the FIFO (i.e. 64-FIFOSIZ).<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:7</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6:0</td>
                            <td>FIFOSIZ</td>
                            <td>RO</td>
                            <td>The number of bytes currently in the FIFO.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="TLNGTH" class="panel-title">TLNGTH - Transfer Length</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x50004104</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x50005104</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Transfer Length</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
// AM_REGn(&lt;MODULE&gt;, &lt;INSTANCE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;(&lt;NUMBER&gt;);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//</span>
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="20">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="12">TLNGTH
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:12</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>11:0</td>
                            <td>TLNGTH</td>
                            <td>RO</td>
                            <td>Remaining transfer length.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="FIFOTHR" class="panel-title">FIFOTHR - FIFO Threshold Configuration</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x50004108</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x50005108</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>FIFO Threshold Configuration</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
// AM_REGn(&lt;MODULE&gt;, &lt;INSTANCE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;(&lt;NUMBER&gt;);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//</span>
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="18">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="6">FIFOWTHR
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="6">FIFORTHR
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:14</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>13:8</td>
                            <td>FIFOWTHR</td>
                            <td>RW</td>
                            <td>FIFO write threshold.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7:6</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5:0</td>
                            <td>FIFORTHR</td>
                            <td>RW</td>
                            <td>FIFO read threshold.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CLKCFG" class="panel-title">CLKCFG - I/O Clock Configuration</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x5000410C</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x5000510C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>I/O Clock Configuration</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
// AM_REGn(&lt;MODULE&gt;, &lt;INSTANCE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;(&lt;NUMBER&gt;);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//</span>
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="8">TOTPER
                                <br>0x0</td>

                            <td align="center" colspan="8">LOWPER
                                <br>0x0</td>

                            <td align="center" colspan="3">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">DIVEN
                                <br>0x0</td>

                            <td align="center" colspan="1">DIV3
                                <br>0x0</td>

                            <td align="center" colspan="3">FSEL
                                <br>0x0</td>

                            <td align="center" colspan="8">RSVD
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:24</td>
                            <td>TOTPER</td>
                            <td>RW</td>
                            <td>Clock total count minus 1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>23:16</td>
                            <td>LOWPER</td>
                            <td>RW</td>
                            <td>Clock low count minus 1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:13</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>DIVEN</td>
                            <td>RW</td>
                            <td>Enable clock division by TOTPER.<br><br>
                                 DIS                  = 0x0 - Disable TOTPER division.<br>
                             EN                   = 0x1 - Enable TOTPER division.</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>DIV3</td>
                            <td>RW</td>
                            <td>Enable divide by 3.<br><br>
                                 DIS                  = 0x0 - Select divide by 1.<br>
                             EN                   = 0x1 - Select divide by 3.</td>
                        </tr>

                        <tr>
                            <td>10:8</td>
                            <td>FSEL</td>
                            <td>RW</td>
                            <td>Select the input clock frequency.<br><br>
                                 HFRC_DIV64           = 0x0 - Selects the HFRC / 64 as the input clock.<br>
                             HFRC                 = 0x1 - Selects the HFRC as the input clock.<br>
                             HFRC_DIV2            = 0x2 - Selects the HFRC / 2 as the input clock.<br>
                             HFRC_DIV4            = 0x3 - Selects the HFRC / 4 as the input clock.<br>
                             HFRC_DIV8            = 0x4 - Selects the HFRC / 8 as the input clock.<br>
                             HFRC_DIV16           = 0x5 - Selects the HFRC / 16 as the input clock.<br>
                             HFRC_DIV32           = 0x6 - Selects the HFRC / 32 as the input clock.<br>
                             RSVD                 = 0x7 - Reserved.</td>
                        </tr>

                        <tr>
                            <td>7:0</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMD" class="panel-title">CMD - Command Register</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x50004110</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x50005110</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Command Register</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
// AM_REGn(&lt;MODULE&gt;, &lt;INSTANCE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;(&lt;NUMBER&gt;);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//</span>
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">CMD
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>CMD</td>
                            <td>RW</td>
                            <td>This register is the I/O Command.<br><br>
                                 POS_LENGTH           = 0x0 - LSB bit position of the CMD LENGTH field.<br>
                             POS_OFFSET           = 0x8 - LSB bit position of the CMD OFFSET field.<br>
                             POS_ADDRESS          = 0x10 - LSB bit position of the I2C CMD ADDRESS field.<br>
                             POS_CHNL             = 0x10 - LSB bit position of the SPI CMD CHANNEL field.<br>
                             POS_UPLNGTH          = 0x17 - LSB bit position of the SPI CMD UPLNGTH field.<br>
                             POS_10BIT            = 0x1A - LSB bit position of the I2C CMD 10-bit field.<br>
                             POS_LSB              = 0x1B - LSB bit position of the CMD LSB-first field.<br>
                             POS_CONT             = 0x1C - LSB bit position of the CMD CONTinue field.<br>
                             POS_OPER             = 0x1D - LSB bit position of the CMD OPERation field.<br>
                             MSK_LENGTH           = 0xFF - LSB bit mask of the CMD LENGTH field.<br>
                             MSK_OFFSET           = 0xFF00 - LSB bit mask of the CMD OFFSET field.<br>
                             MSK_ADDRESS          = 0xFF0000 - LSB bit mask of the I2C CMD ADDRESS field.<br>
                             MSK_CHNL             = 0x70000 - LSB bit mask of the SPI CMD CHANNEL field.<br>
                             MSK_UPLNGTH          = 0x7800000 - LSB bit mask of the SPI CMD UPLNGTH field.<br>
                             MSK_10BIT            = 0x4000000 - LSB bit mask of the I2C CMD 10-bit field.<br>
                             MSK_LSB              = 0x8000000 - LSB bit mask of the CMD LSB-first field.<br>
                             MSK_CONT             = 0x10000000 - LSB bit mask of the CMD CONTinue field.<br>
                             MSK_OPER             = 0xE0000000 - LSB bit mask of the CMD OPERation field.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMDRPT" class="panel-title">CMDRPT - Command Repeat Register</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x50004114</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x50005114</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Command Repeat Register</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
// AM_REGn(&lt;MODULE&gt;, &lt;INSTANCE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;(&lt;NUMBER&gt;);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//</span>
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="27">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="5">CMDRPT
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:5</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4:0</td>
                            <td>CMDRPT</td>
                            <td>RW</td>
                            <td>These bits hold the Command repeat count.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="STATUS" class="panel-title">STATUS - Status Register</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x50004118</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x50005118</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Status Register</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
// AM_REGn(&lt;MODULE&gt;, &lt;INSTANCE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;(&lt;NUMBER&gt;);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//</span>
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="29">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">IDLEST
                                <br>0x0</td>

                            <td align="center" colspan="1">CMDACT
                                <br>0x0</td>

                            <td align="center" colspan="1">ERR
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:3</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>IDLEST</td>
                            <td>RO</td>
                            <td>This bit indicates if the I/O state machine is IDLE.<br><br>
                                 IDLE                 = 0x1 - The I/O state machine is in the idle state.</td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>CMDACT</td>
                            <td>RO</td>
                            <td>This bit indicates if the I/O Command is active.<br><br>
                                 ACTIVE               = 0x1 - An I/O command is active.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>ERR</td>
                            <td>RO</td>
                            <td>This bit indicates if an error interrupt has occurred.<br><br>
                                 ERROR                = 0x1 - An error has been indicated by the IOM.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CFG" class="panel-title">CFG - I/O Master Configuration</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x5000411C</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x5000511C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>I/O Master Configuration</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
// AM_REGn(&lt;MODULE&gt;, &lt;INSTANCE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;(&lt;NUMBER&gt;);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//</span>
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">IFCEN
                                <br>0x0</td>

                            <td align="center" colspan="28">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">SPHA
                                <br>0x0</td>

                            <td align="center" colspan="1">SPOL
                                <br>0x0</td>

                            <td align="center" colspan="1">IFCSEL
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>IFCEN</td>
                            <td>RW</td>
                            <td>This bit enables the IO Master.<br><br>
                                 DIS                  = 0x0 - Disable the IO Master.<br>
                             EN                   = 0x1 - Enable the IO Master.</td>
                        </tr>

                        <tr>
                            <td>30:3</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>SPHA</td>
                            <td>RW</td>
                            <td>This bit selects SPI phase.<br><br>
                                 SAMPLE_LEADING_EDGE  = 0x0 - Sample on the leading (first) clock edge.<br>
                             SAMPLE_TRAILING_EDGE = 0x1 - Sample on the trailing (second) clock edge.</td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>SPOL</td>
                            <td>RW</td>
                            <td>This bit selects SPI polarity.<br><br>
                                 CLK_BASE_0           = 0x0 - The base value of the clock is 0.<br>
                             CLK_BASE_1           = 0x1 - The base value of the clock is 1.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>IFCSEL</td>
                            <td>RW</td>
                            <td>This bit selects the I/O interface.<br><br>
                                 I2C                  = 0x0 - Selects I2C interface for the I/O Master.<br>
                             SPI                  = 0x1 - Selects SPI interface for the I/O Master.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="INTEN" class="panel-title">INTEN - IO Master Interrupts: Enable</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x50004200</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x50005200</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Set bits in this register to allow this module to generate the corresponding interrupt.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
// AM_REGn(&lt;MODULE&gt;, &lt;INSTANCE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;(&lt;NUMBER&gt;);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//</span>
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="21">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">ARB
                                <br>0x0</td>

                            <td align="center" colspan="1">STOP
                                <br>0x0</td>

                            <td align="center" colspan="1">START
                                <br>0x0</td>

                            <td align="center" colspan="1">ICMD
                                <br>0x0</td>

                            <td align="center" colspan="1">IACC
                                <br>0x0</td>

                            <td align="center" colspan="1">WTLEN
                                <br>0x0</td>

                            <td align="center" colspan="1">NAK
                                <br>0x0</td>

                            <td align="center" colspan="1">FOVFL
                                <br>0x0</td>

                            <td align="center" colspan="1">FUNDFL
                                <br>0x0</td>

                            <td align="center" colspan="1">THR
                                <br>0x0</td>

                            <td align="center" colspan="1">CMDCMP
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:11</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>ARB</td>
                            <td>RW</td>
                            <td>This is the arbitration loss interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>STOP</td>
                            <td>RW</td>
                            <td>This is the STOP command interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>START</td>
                            <td>RW</td>
                            <td>This is the START command interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>ICMD</td>
                            <td>RW</td>
                            <td>This is the illegal command interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>IACC</td>
                            <td>RW</td>
                            <td>This is the illegal FIFO access interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>WTLEN</td>
                            <td>RW</td>
                            <td>This is the write length mismatch interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>NAK</td>
                            <td>RW</td>
                            <td>This is the I2C NAK interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>FOVFL</td>
                            <td>RW</td>
                            <td>This is the Read FIFO Overflow interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>FUNDFL</td>
                            <td>RW</td>
                            <td>This is the Write FIFO Underflow interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>THR</td>
                            <td>RW</td>
                            <td>This is the FIFO Threshold interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>CMDCMP</td>
                            <td>RW</td>
                            <td>This is the Command Complete interrupt.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="INTSTAT" class="panel-title">INTSTAT - IO Master Interrupts: Status</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x50004204</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x50005204</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Read bits from this register to discover the cause of a recent interrupt.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
// AM_REGn(&lt;MODULE&gt;, &lt;INSTANCE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;(&lt;NUMBER&gt;);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//</span>
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="21">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">ARB
                                <br>0x0</td>

                            <td align="center" colspan="1">STOP
                                <br>0x0</td>

                            <td align="center" colspan="1">START
                                <br>0x0</td>

                            <td align="center" colspan="1">ICMD
                                <br>0x0</td>

                            <td align="center" colspan="1">IACC
                                <br>0x0</td>

                            <td align="center" colspan="1">WTLEN
                                <br>0x0</td>

                            <td align="center" colspan="1">NAK
                                <br>0x0</td>

                            <td align="center" colspan="1">FOVFL
                                <br>0x0</td>

                            <td align="center" colspan="1">FUNDFL
                                <br>0x0</td>

                            <td align="center" colspan="1">THR
                                <br>0x0</td>

                            <td align="center" colspan="1">CMDCMP
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:11</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>ARB</td>
                            <td>RW</td>
                            <td>This is the arbitration loss interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>STOP</td>
                            <td>RW</td>
                            <td>This is the STOP command interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>START</td>
                            <td>RW</td>
                            <td>This is the START command interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>ICMD</td>
                            <td>RW</td>
                            <td>This is the illegal command interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>IACC</td>
                            <td>RW</td>
                            <td>This is the illegal FIFO access interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>WTLEN</td>
                            <td>RW</td>
                            <td>This is the write length mismatch interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>NAK</td>
                            <td>RW</td>
                            <td>This is the I2C NAK interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>FOVFL</td>
                            <td>RW</td>
                            <td>This is the Read FIFO Overflow interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>FUNDFL</td>
                            <td>RW</td>
                            <td>This is the Write FIFO Underflow interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>THR</td>
                            <td>RW</td>
                            <td>This is the FIFO Threshold interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>CMDCMP</td>
                            <td>RW</td>
                            <td>This is the Command Complete interrupt.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="INTCLR" class="panel-title">INTCLR - IO Master Interrupts: Clear</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x50004208</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x50005208</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Write a 1 to a bit in this register to clear the interrupt status associated with that bit.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
// AM_REGn(&lt;MODULE&gt;, &lt;INSTANCE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;(&lt;NUMBER&gt;);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//</span>
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="21">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">ARB
                                <br>0x0</td>

                            <td align="center" colspan="1">STOP
                                <br>0x0</td>

                            <td align="center" colspan="1">START
                                <br>0x0</td>

                            <td align="center" colspan="1">ICMD
                                <br>0x0</td>

                            <td align="center" colspan="1">IACC
                                <br>0x0</td>

                            <td align="center" colspan="1">WTLEN
                                <br>0x0</td>

                            <td align="center" colspan="1">NAK
                                <br>0x0</td>

                            <td align="center" colspan="1">FOVFL
                                <br>0x0</td>

                            <td align="center" colspan="1">FUNDFL
                                <br>0x0</td>

                            <td align="center" colspan="1">THR
                                <br>0x0</td>

                            <td align="center" colspan="1">CMDCMP
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:11</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>ARB</td>
                            <td>RW</td>
                            <td>This is the arbitration loss interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>STOP</td>
                            <td>RW</td>
                            <td>This is the STOP command interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>START</td>
                            <td>RW</td>
                            <td>This is the START command interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>ICMD</td>
                            <td>RW</td>
                            <td>This is the illegal command interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>IACC</td>
                            <td>RW</td>
                            <td>This is the illegal FIFO access interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>WTLEN</td>
                            <td>RW</td>
                            <td>This is the write length mismatch interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>NAK</td>
                            <td>RW</td>
                            <td>This is the I2C NAK interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>FOVFL</td>
                            <td>RW</td>
                            <td>This is the Read FIFO Overflow interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>FUNDFL</td>
                            <td>RW</td>
                            <td>This is the Write FIFO Underflow interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>THR</td>
                            <td>RW</td>
                            <td>This is the FIFO Threshold interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>CMDCMP</td>
                            <td>RW</td>
                            <td>This is the Command Complete interrupt.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="INTSET" class="panel-title">INTSET - IO Master Interrupts: Set</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x5000420C</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x5000520C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Write a 1 to a bit in this register to instantly generate an interrupt from this module. (Generally used for testing purposes).</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
// AM_REGn(&lt;MODULE&gt;, &lt;INSTANCE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;_&lt;VALUE&gt;;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(&lt;MODULE&gt;, &lt;REGISTER&gt;) |= AM_REG_&lt;MODULE&gt;_&lt;REGISTER&gt;_&lt;FIELD&gt;(&lt;NUMBER&gt;);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//</span>
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);</pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="21">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">ARB
                                <br>0x0</td>

                            <td align="center" colspan="1">STOP
                                <br>0x0</td>

                            <td align="center" colspan="1">START
                                <br>0x0</td>

                            <td align="center" colspan="1">ICMD
                                <br>0x0</td>

                            <td align="center" colspan="1">IACC
                                <br>0x0</td>

                            <td align="center" colspan="1">WTLEN
                                <br>0x0</td>

                            <td align="center" colspan="1">NAK
                                <br>0x0</td>

                            <td align="center" colspan="1">FOVFL
                                <br>0x0</td>

                            <td align="center" colspan="1">FUNDFL
                                <br>0x0</td>

                            <td align="center" colspan="1">THR
                                <br>0x0</td>

                            <td align="center" colspan="1">CMDCMP
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:11</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>ARB</td>
                            <td>RW</td>
                            <td>This is the arbitration loss interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>STOP</td>
                            <td>RW</td>
                            <td>This is the STOP command interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>START</td>
                            <td>RW</td>
                            <td>This is the START command interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>ICMD</td>
                            <td>RW</td>
                            <td>This is the illegal command interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>IACC</td>
                            <td>RW</td>
                            <td>This is the illegal FIFO access interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>WTLEN</td>
                            <td>RW</td>
                            <td>This is the write length mismatch interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>NAK</td>
                            <td>RW</td>
                            <td>This is the I2C NAK interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>FOVFL</td>
                            <td>RW</td>
                            <td>This is the Read FIFO Overflow interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>FUNDFL</td>
                            <td>RW</td>
                            <td>This is the Write FIFO Underflow interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>THR</td>
                            <td>RW</td>
                            <td>This is the FIFO Threshold interrupt.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>CMDCMP</td>
                            <td>RW</td>
                            <td>This is the Command Complete interrupt.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

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